Cache miss rates are an important subset of system model inputs. Cache miss rate models are used for broad design space exploration in which many cach...

A simple mechanism to increase the utilization of a small trace cache, and simultaneously reduce its power consumption, is presented in this article....

Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource int...

Mutual exclusion locks remain the de facto mechanism for concurrency control on shared-memory data structures. However, their apparent simplicity is d...

Designing and implementing system software so that it scales well on shared-memory multiprocessors (SMMPs) has proven to be surprisingly challenging....