Résumé: Main memory is one of the major energy consumers in computing systems. In this paper, we propose a new memory organisation, called Power-Aware Cached-DRAM (PA-CDRAM) that integrates a moderately sized cache directly into a memory device. We use this cache to turn memory banks off immediately after memory accesses to reduce energy consumption. We modify CDRAM (originally optimised for performance) to reduce energy consumption. We describe our memory organisation, the challenges for achieving low energy consumption and how to address them. Results show that PA-CDRAM achieves 28% average improvement in energy-delay when compared to traditional memory employing time-out power management.

Langue: Anglais