ملخص: This paper describes an advanced PNP bipolar transistor which has been designed by using the mixed two-dimensional device/circuit simulation (CODECS) [1] for a low-power and very-high-performance 0.25 [mu]m complementary BiCMOS (CBiCMOS) device. The optimized PNP structure has a 30-nm-wide emitter, a 39-nm-wide intrinsic base region, a maximum cut-off frequency of 14 GHz and a current gain of 16 (without poly-Si emitter effect). A high performance and limits in terms of delay for pull-down of 0.25 [mu]m CBiCMOS were obtained and compared to those offered by BiCMOS and complementary metal-oxide semiconductor circuits at different power supplies and charge capacitance. An improvement of 1.5 x at 1 pF, 1.6 x at 0.6 pF and 2 x at 0.2 pF over BiCMOS has been achieved.

لغة: إنجليزية